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Conference Program (Pictures)
| 8:30 - 9:30 |
Registration and breakfast |
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| 9:30 - 9:40 |
Conference Opening |
| 9:40 - 10:30 |
Invited talk (Prof. Hubert Kaeslin, ETH Zurich)
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| 10:30 - 11:00 |
Coffee break and poster session |
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| 11:00 - 12:45 |
Technical Session 1 - Analog Designs, Sensors
Session chair: Peter Söser |
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1. Highly Sensitive 2 Gb/s Optoreceiver with CMOS Compatible Avalanche Photodiode
Paul Brandl, Wolfgang Gaberl, Reinhard Enne, Kerstin Schneider-Hornstein, and Horst Zimmermann
Vienna University of Technology (Austria)
2. PCDS: A New Approach for the Development of Circuit Generators in Analog IC Design
Daniel Marolt, Matthias Greif, Juergen Scheible, and Goeran Jerke
Reutlingen University (Germany); Robert Bosch GmbH, Reutlingen (Germany)
3. Design and Characterization of a 10bit Pipeline- ADC for 100MSps in 0.18um CMOS
Christoph Gamauf, Alexander Nemecek, Friedrich Peter Leisenberger, and Gilbert Promitzer
University of Applied Sciences Wiener Neustadt (Austria); ams AG (Austria)
4. Concept and Implementation of a Low-Cost and Accurate Jitter Measurement Equipment for Magnetic Speed Sensors
Kevin Pluch and Manfred Ley
Infineon Technologies Austria AG; Carinthian University of Applied Sciences (Austria)
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| 12:45 - 14:00 |
Lunch |
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| 14:00 - 15:45 |
Technical Session 2 - Digital Designs, Low-Area Systems, Security
Session chair: Johannes Wolkerstorfer |
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5. Evaluation of the Back-End Design Overhead for ASIC Implementations of Large-Operand Multipliers Targeting Resource-Constrained Environments
Christoph Nagl, Michael Muehlberghuber, and Frank K. Gürkaynak
ETH Zurich (Switzerland)
6. A Low-area ASIC Implementation of AEGIS128, a Fast Authenticated Encryption Algorithm
Robert Schilling, Manuel Jelinek, Markus Ortoff, and Thomas Unterluggauer
Graz University of Technology, IAIK (Austria)
7. A Simple and Reliable Cell for Single Bit Physically Unclonable Constants
Riccardo Bernardini and Roberto Rinaldo
University of Udine (Italy)
8. Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC
Varadan Savulimedu Veeravalli and Andreas Steininger
Vienna University of Technology (Austria)
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| 15:45 - 16:15 |
Coffee break and poster session |
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| 16:15 - 17:55 |
Technical Session 3 - Low-Noise Amplifiers, RF Applications, Filters
Session chair: Johannes Sturm |
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9. Impact of Spread Spectrum EMI-Reduction on Audio Performance of Filterless Class-D Amplifiers
Timucin Karaca, Mario Auer, Gunter Winkler, and Bernd Deutschmann
Graz University of Technology, IFE (Austria)
10. A Measurement Method to Mitigate Temperature Effects in Nanometer CMOS RF Power Amplifiers
Patrick Oßmann, Jörg Fuhrmann, José Moreira, Harald Pretl, and Andreas Springer
Johannes Kepler University Linz (Austria); DMCE GmbH & Co. KG (Austria); Intel Mobile Communications (Austria)
11. A Wideband Resistive Feedback Balun LNA in 65 nm CMOS Technology
Suchendranath Popuri, Xinbo Xiang, and Johannes Sturm
Carinthia University of Applied Sciences (Austria); Lantiq A GmbH (Austria)
12. Low-Noise Transimpedance Amplifier Design Procedure for Optical Communications
Shahab Shahdoost, Ali Medi, Bardia Bozorgzadeh, and Namdar Saniei
Case Western Reserve University (USA); Sharif University of Technology (Iran); University of Ontario Institute of Technology (Canada)
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| 17:55 - 18:00 |
Outlook to Austrochip 2015 |
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| 18:00 - 21:00 |
Social Dinner |
Poster Presentations
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Poster Sessions (10:30 - 11:00 and 15:45 - 16:15)
Poster-session chair: Thomas Korak |
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1. Modeling and Simulation of the Peripheral Sensor Interface Transmission Channel using Wave Digital Filters (pdf)
Lakshmy Neela, Dirk Hammerschmidt, Grzegorz Smietanka, Jurgen Gotze, Wolfgang Scherr, and Andrei Basa
Infineon Technologies Austria AG (Austria); Technische University Dortmund (Germany); Infineon Technologies Romania (Romania)
2. A Hybride Voltage Reference (pdf)
Maximilian Hofer, Robert Kolm, Albert Missoni, and Christoph Boehm
Infineon Technologies Austria (Austria)
3. Towards a Lightweight Hardware Implementation of PRIMATEs - a Recent Authenticated Encryption Candidate (pdf)
Thomas Korak, Philipp Jantscher, Richard Fellner, and Samuel Weiser
Graz University of Technology, IAIK (Austria)
4. Sub-Retinal Implants Based on CMOS Chip With Active Pixel Array (pdf)
Sandra Klinger and Walter-G. Wrobel
Retina Implant AG (Germany)
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